The invention relates to a method for controlling light emission of a matrix display in a display period and an apparatus for carrying out the method.
More specifically the invention is closely related to a new addressing concept for matrix displays in which different grey levels for pixels are generated by controlling light emission/reflection/transmission with small pulses in a pulse width modulation form. Such a concept is e.g. used in plasma display panels (PDP) or other display devices where the pixel values control the generation of a corresponding number of small lighting pulses on the display.
The Plasma technology now makes it possible to achieve flat colour panels of large size (out of the CRT limitations) and with very limited depth without any viewing angle constraints.
Referring to the last generation of European TV, a lot of work has been made to improve its picture quality. Consequently, a new technology like the Plasma one has to provide a picture quality as good or better than standard TV technology. This picture quality can be decomposed in different parameters:
good response fidelity of the panel: A panel having a good response fidelity ensures that only one pixel could be ON in the middle of a black screen and in addition, this panel has to perform a good homogeneity. In order to improve that, a so-called xe2x80x9cprimingxe2x80x9d is used which aims to excite the whole cells of the panel regularly but only during a short time. Nevertheless, since an excitation of a cell is characterized by an emission of light, the priming will modify the level of black. Therefore, this solution has to be used parsimoniously.
good brightness of the screen: This is limited by the dead time of the panel, a time in which no light is produced, comprising mostly the addressing time, and the erase time.
good contrast ratio even in a dark room: This is limited by the brightness of the panel combined with the black level       (          ratio      ⁢              Brightness        blacklevel              )    .
In order to improve the response fidelity, the use of xe2x80x9cprimingxe2x80x9d will, at the same time, reduce the contrast ratio.
All these parameters are also completely linked together and an optimal compromise has to be chosen to provide the best picture quality at the end.
Moreover, the success of such a new emerging technology is also dependent on its price. Furthermore, the power consumption of such a product should be as low as possible to ensure a consumer success.
A Plasma Display Panel (PDP) utilizes a matrix array of discharge cells which could only be xe2x80x9cONxe2x80x9d or xe2x80x9cOFFxe2x80x9d. Also unlike a CRT or LCD in which grey levels are expressed by analogue control of the light emission, a PDP controls the grey level by modulating the number of light pulses per frame (sustain pulses). This time-modulation will be integrated by the eye over a period corresponding to the eye time response.
Since the video amplitude determines the number of light pulses, occurring at a given frequency, more amplitude means more light pulses and thus more xe2x80x9cONxe2x80x9d time. For this reason, this kind of modulation is also known as PWM, pulse width modulation. To establish a concept for this PWM, each frame will be decomposed in sub-periods called xe2x80x9csub-fieldsxe2x80x9d.
For producing the small light pulses, an electrical discharge will appear in a gas filled cell, called plasma and the produced UV radiation will excite a colored phosphor which emits the light.
In order to select which cell should be lighted, a first selective operation called addressing will create a charge in the cell to be lighted. Each plasma cell can be considered as a capacitor which keeps the charge for a long time. Afterwards, a general operation called xe2x80x9csustainxe2x80x9d applied during the lighting period will add charges in the cell. In the cell addressed during the first selective operation, the two charges together will build up between two electrodes of the cell a firing voltage. UV radiation is generated which excites the phosphor for light emission. The discharge of the cell is made in a very short period and there remains some charge in the cell. With the next sustain pulse, this charge is increased again up to the firing voltage so that the next discharge will happen and the next light pulse will produced. During the whole sustain period of each specific sub-field, the cell will be lighted in small pulses. At the end, an erase operation will remove all the charges to prepare a new cycle.
The principle structure of a plasma cell in matrix plasma display technologie is shown in FIG. 1. Reference number 10 denotes the face plate made of glass. With reference number 11 a transparent line electrode is denoted. The back plate of the panel is referenced with reference number 12. There are two dielectric layers 13 for isolating face and back plate against each other. In the back plate are integrated column electrodes 14 being perpendicular to the line electrodes 11. The inner part of the cells consists of the luminous substance 15 (phosphor) and separators 16 for separating the different coloured phosphors (green 15a), (blue 15b), (red 15c). The UV radiation caused by the discharge is denoted with reference number 17. The light emitted from the green phosphor 15a is indicated with arrows having the reference number 18. From this structure of a PDP it is clear, that there are three plasma cells necessary, corresponding to the three colour components R,G,B, to produce the colour of a picture element of the displayed picture.
The gray level of each R,G,B component of a pixel is controlled in a PDP by modulating the number of light pulses per frame period. This time modulation will be integrated by the eye over a period corresponding to the human eye timexe2x80x94response.
This principle will now be explained. But those skilled in the art will known the principle from the literature. In video technology an 8 bit representation of each colour component R,G,B is common. In that case each level of the luminance for each colour component will be represented by a combination of the 8 following bits:
1 -2 -4 -8 -16 -32 -64 -128 
To realize such a coding with the PDP technology, the frame period will be divided in 8 lighting periods (called sub-fields), each one corresponding to a bit. The number of light pulses for the bit xe2x80x9c2xe2x80x9d is the double as for the bit xe2x80x9c1xe2x80x9d, and so forth. With these 8 sub-periods, it is possible, through sub-field combination, to build the 256 gray levels. The standard principle used to generate this gray modulation is based on the ADS (Address/Display Separated) principle, in which all operations are performed at different time on the whole panel. This principle is illustrated in FIG. 2.
FIG. 2 represents an example of ADS addressing scheme based on an 8-bit encoding with only one priming period at the beginning of the frame. This is only an example and there are very different sub-field organisations known from the literature with e.g. more sub-fields and different sub-field weights. Often, more sub-fields are used to reduce moving artifacts and priming could be used on more sub-fields to increase the response fidelity. Priming is a separate optional period, where the cells are charged. This charge can lead to a small discharge, i.e. can create background light, which is in principle unwanted. After the priming period an erase period follows for immediately quenching the charge. This is required for the following sub-field periods, where the cells need to be addressed again. So priming is a period which facilitates the following addressing periods, i.e. it improves the efficiency of the writing stage by regularly exciting all cells, simultaneously.
In the ADS addressing method all the basic cycles are made one after the other. At first, all cells of the panel will be written (addressed) in one period, afterwards all cells will be lighted (sustained) and at the end all cells will be erased together. In all these cases, since operations are made on the whole panel, the time required for the operation, is long. In other words, if we take the example of priming and writing, the time between the last cell to be written and the priming of the whole panel has the duration of the writing of all previous cells. In that case, the efficiency of the priming operation is reduced, because the time distance between priming a cell and sustaining a cell is long. In this time period the cell can recover from the priming operation and the bonus effect of priming is subjectively smaller. In consequence, more energy to write the cells is needed. The same thing happens in case of sustaining with a long time between writing and sustaining. Even in that case, we need more energy to write the cell to be sure that the sustain will work afterwards (the stored charges diminish with the time). In addition, there is a strong flow of energy during the sustain time and not during any other operation. This means that energy is concentrated and not spread during the whole frame. This introduces more stress in the power supply which requires higher quality of components at higher prices (bigger capacitors, etc.).
In FIG. 2 the sub-fields SF1 to SF8 vary in lengths. Each sub-field consists of addressing period, sustain period and erase period. The addressing period length is equal for all sub-fields, also the erase period length. In the addressing period, the cells are addressed linewise from line 1 to line N of the display. In the erasing period all the cells will be discharged in parallel in one shot, which does not take as much time as for addressing. The example in FIG. 2, shows that all operations addressing, sustaining and erasing are completely separated in time. At one point in time there is one of these operations active for the whole panel. And this reduces the efficiency of these operations. There is a long time between operations which should interact. In addition, there is a strong concentration of energy during the sustain periods which will stress the power supply of the PDP. These drawbacks are explained in greater detail with the illustration shown in FIG. 3.
In FIG. 3, Tad stands for the addressing time for the complete panel. Ter stands for the erasing time of the complete panel. And these are the long time distances which cause a problem. During these times, the charge of a written cell can diminish and the cell characteristics may change in general, e.g. resitance, capacity, etc. as explained above. To improve the situatuion, one first idea could be to simply reduce the addressing time by a faster addressing but this would have a negative impact on the response fidelity of the panel. In like manner, a reduction of the erase time can generate false erasure which appears as flashing pixels in dark areas.
A first approach of solving these problems, is described in U.S. Pat. No. 5,903,245. In this document it is proposed to subdivide a plasma display panel in several partitions, called scan blocks. The solution is described at the example of a panel made in coplanar plasma display technology. The addressing of the panel is made different to the above described ADS addressing scheme. The addressing (writing) is done separately for the different scan blocks, and no longer for the whole panel. This allows for a reduction of the time difference between addressing and sustaining periods even in the simplest embodiment, where a common sustain period is following after the last scan block has been addressed. In an advanced embodiment described in this document (see FIG. 23), there follows after a completed addressing period for one scan block, immediately, a relatively short sustain phase for this scan block. During this phase, in the remaining scan blocks a priming and erase period or a sustain period is likewise performed. Thus, in this embodiment a spreading of the sustaining period is achieved and the energy output is stretched in the sub-field periods. However, there follows in each case a constant sustain period after the addressing period as can be seen in FIG. 27 and the corresponding description.
It is an object of the invention to further improve the addressing scheme of plasma display panels, so that the energy output is better spread over the frame period. This object is solved by a method according to claim 1.
It is a further object of the invention to disclose an apparatus which is capable of performing the inventive method. Such an advantageous apparatus is defined in claim 4.
The addressing scheme according to the invention, called ADM (address display multiplexing) individualizes all the basic operations addressing, sustaining and erasing to a part of the panel (called sub-panel), for instance per driver, to reduce time between each operation performed on a given sub-panel. Instead of writing the whole panel, only a sub-panel will be written and afterwards this sub-panel will be lighted. This is common to the solution described in U.S. Pat. No. 5,903,245.
The further improvement to the disclosure of this document consists in the measure that the time distance between the successive addressing periods for the respective sub-panels is set to be constant within a given sub-field but varies from one sub-field to the other. The variation of the time distance between sub-field addressing periods in different sub-fields improves the efficiency of each basic operation to achieve a low-voltage addressing as well as a better response fidelity and a better panel homogeneity. In addition the improvement in terms of addressing efficiency, panel homogeneity will permit to increase the speed of some operation (addressing, sustaining) to win more time, which can be used for generating more light. Moreover, the use of low-power addressing will further reduce the price of the electronics. In addition, the energy will be spread during the whole frame and the peak current will be reduced, as well as the stress on all the power components. For these reasons, it will be possible to reduce the cost as well as the power supply complexity, in terms of component count.
For ease of implemetation of the new addressing scheme in an apparatus, it is advantageous to make the partition of the panel in sub-panels in correspondence to the amount and size of the plasma display panel scan drivers as claimed in claim 4.
Further advantageous embodiments are apparent from the dependent claims.